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Design And Implement On The Dual-DSP Strapdown Navigation Computer

Posted on:2010-09-10Degree:MasterType:Thesis
Country:ChinaCandidate:Z Q LinFull Text:PDF
GTID:2178360275478633Subject:Detection technology and automation equipment
Abstract/Summary:PDF Full Text Request
With lower cost and higher accuracy of Silicon micro-accelerometer, simple to use accelerometer constitute GF-SIMS system study has been gotten great attention. GF-SINS system not only can greatly reduce the cost of inertial navigation system but also can overcome the weaknesses gyro can not adapt to large-angle measurement .It will have good application prospects at navigation without the need for high precision, but caring a lot about the cost of navigation equipment .So dual-DSP free gyro strap down inertial navigation computer design is the main research in this article, and research objective is to data processing and navigation algorithms achievement.In this article, based on the research of GF-SINS system, the main point is the design and implementation of the hardware and the driving software. In accordance with the accelerometer configuration in the system and the output signal characteristics, the major research work is about: the initial accelerometer signal filter; the 24 bit high-precision AD with digital signal processing chip connection; how to connect dual DSP chip between each other. Then, there is the two way to realize the asynchronous serial interface: the interface with the PC machine communication by chip MAX3111E, and other by chip TL16C554 to communicate with GPS and Gyrocompass. Finally, some important parts of DSP system design are explained and some simple circuits are attached to the circuit schematic.According to the requirements of the system, used the DSP development environment CCS, It is important to program the system driving software. Specific work is accomplished, including: the specific functions explain and configuration of AD registers; the cmd file defines the program placement in the memory; finally the article explains the Dual DSP chip communication by DSP HPI and EMIF interface. In addition the serial interface extending program is written by VHDL in CPLD.At last the article explains the entire GF-SINS system debugging process and put forward solution to the problem arising in the test.
Keywords/Search Tags:dual-DSP, 24 bit AD, TMS320C6713, GF-SINS
PDF Full Text Request
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