| With the extension in the field of multimedia applications in recent years, people begin to pay more attention to the field of how to apply advanced compression technologies to practical applications while doing researches of new thoeries. As a new video standard, H.264 raises the compression rate obviously than those used video standards. And it is more suitable for transmitting in the network, but its computation complexity is multiplied. For the increased computational complexity, it is difficult for H.264 video compression standard to be widly used to pratical applications in the current conditions. Therefore, the realization and optimization of the H.264 is very necessary and significant. As embedded systems, especially the portable handset terminals, they usually try to keep balance between performance and power consumption. ARM processors can fairly meet this requirement.On the basis of understanding the theories and standards of H.264 Video Baseline Profile, this thesis analyses the bottleneck on the non-optimized decoder software on ARM9EJ platform and summarizes the aspects that need optimizing. H.264 video decoder software is optimized to improve the efficiency of the CPU according to the architecture of ARM processor. The optimization work is mainly focusing on the overall structure and various functional modues. In the last part, the implementation of a simple H.264 video playback system on MX21(ARM926EJ core) platform is discussed. The test results show that the QCIFs with various motion complexities meet the basic needs after the decoder core and the playback system being fully optimized.The work done at this stage is a good preparation for the future practical application, and the methods used in this thesis are instructive for the applications on other platforms as well. |
