The Research And Implementation Of Digital Up/Down Conversion And Peak-to-Average Power Ratio Reduction In WCDMA Digital Repeater

With the development of 3G network's construction, mobile phone users increase gradually. Higher exceptions about the network's quality and coverage are proposed. In fact, the cost of base station is a great proportion of the network's investment, and finding location of the base station is very difficult. So the repeater has been widely utilized in our country's mobile communication network applications, which due to its distinguishing characteristics: low cost, ease of installation, low power consumption and etc.At present, in order to improve the network's quality, solve the network's blind spots or weak areas and enhance the network's coverage, the repeater has already been one of the principal means. However, the traditional analog repeater is greatly influenced by the surrounding environment, and it has a poor anti-jamming capability, a limited transmission distance, and a low amplifier's efficiency. More importantly, there is no uniform protocol specification to meet the compatibility of the system vendors and repeater vendors. So, the mobile communication market needs the digital repeater urgently.The dissertation's aim is to design the digital repeater, and the research focuses on the digital IF front end design and its relevant technology.Firstly, the dissertation introduces the digital repeater's background and current status. And then, the design idea and the system framework are thoroughly described. The function modules of the digital IF are described in detail. In response to the issue of modules design in DDC/DUC, the dissertation focuses on the related theory, such as signal sampling theory, interpolation and decimation theory. Based on the theory, the dissertation describes the efficient methods of implementation. Finally, the modules of DDC and DUC are implemented in FPGA.In digital repeater, Peak-to-Average Power Ratio (PAPR) reduction, which is also called Crest Factor Reduction (CFR), is one of the key methods of improving the amplifier's efficiency. The dissertation outlines three PAPR reduction methods firstly, then simulates and analyses some commonly used arithmetic. On the basis of considering the result of the PAPR reduction and the complexity of the implementation, the dissertation proposes an improved arithmetic, which is called secondary clipping arithmetic. Then the dissertation simulates the arithmetic to check the arithmetic's feasibility. After confirming the arithmetic's feasibility, the dissertation proposes the architecture of "first decomposition, then synthesis" in response to the noise shaping filter, and then points out that the narrowband filters can be implemented by interpolated FIR(IFIR) structure. Finally, the arithmetic is implemented in FPGA.Under the guidance of software defined radio (SDR), the digital IF front end design in WCDMA digital repeater is implemented by the system-level design methods. Comply with the relevant standards such as 3GPP, the dissertation completes the system's simulation test and hardware test. At the end, the dissertation draws the conclusion, that is, the scheme has the basic function of the digital IF in WCDMA digital repeater and it can realize smooth transition between the different carriers and easily upgrade between the different standards on the basis of the existing hardware.