Design And Implement Of High Resolution Time-to-Digital Converter(TDC)

Over recent years, as PET is widely applied to clinical diagnosis and drug experiment, PET has draw more and more people's attention. Meanwhile, some of traditional PET system's insufficiencies expose themselves gradually, such as the low resolution and low contrast of traditional PET image. Aimed at these flaws, many researchers propose many different methods to improve PET system, like all-digital PET and TOF technology. Whatever method is proposed, high time resolution can effectively raise the signal/noise ratio of PET image, which makes how to get high resolution a key technology.Based on the conclusion of usual time interval measuring methods, this thesis chooses the scheme of Time-to-Digital Converter (TDC) based on delay line structure, meeting the new type of PET system's requirement for high timing resolution. This TDC contains two delay lines and a main counter. After finishing the framework of the TDC using Verilog, we confirm the architecture of the delay element by emulation and on-board test. Finally this thesis implements a TDC system of time resolution below 200 ps on a FPGA development board.Thereafter, according to the measuring method based on statistics, this thesis proposes a method to test the TDC system using PC for generating random pulses, transmitting data through RS232 DB9 interface, and accomplishes the design and implementation of both PC and FPGA ends'function. Finally, after using this test platform for TDC system, the data of time resolution, differential nonlinearity, and integral nonlinearity was obtained.Finally, this thesis makes summary and proposes the prospect of research work to do in future...