Research And Hardware Realization On Deinterleaving Algorithm Of Radar Signal

The sorting of radar signal is a very important part of electronic countermeasures. With the rapid development of electronic techniques, radar signal becomes more and more complicated. Under this kind of environment, new methods of sorting must be proposed and applied into practice.The pulse repetition interval (PRI) is an important parameter of the deinterleaving of radar pulse. The main algorithms of radar signal sorting at present are introduced in this article. Some of them are simulated and compared. This paper focuses on the PRI Transform algorithm. Based on hardware realization, an improved method is proposed using the method of pulse searching after the modified PRI transform.With the development of modern electronic technology, the performance of FPGA and DSP has rapidly improved. They become more and more popular with electronic designers. This paper presents a radar signal sorting circuitry using DSP and FPGA. And an improved sorting method is accomplished based on the hardware platform. The contributions of this thesis are shown as following.1. A real-time radar signal sorting hardware platform is designed, including system power, FPGA, DSP and their external peripheral circuit design.2. Accomplish pulse measuring module with VHDL. Develop embedded core of FPGA to accomplish data pre-processing.3. Develop multi-parameter storing algorithm in DSP. Accomplish PRI Transform algorithm in DSP.It shows that this signal sorting processing circuit board can deinterleave several different radar signals. It has strong ability of deinterleaving.