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The Design Of Wireless Digital Audio Signal Processing Oriented SoC

Posted on:2009-04-27Degree:MasterType:Thesis
Country:ChinaCandidate:G Q LongFull Text:PDF
GTID:2178360272477896Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
As the development of VLSI, the number of transistors that can be integrated in a single chip is growing bigger and bigger. Nowadays the chip designer could integrate almost all the components including processors, memories, special function units, and analog devices into a single chip, and design a highly integrated IC, named system-on-chip (SoC). Meanwhile the digital communication technology is promoted fast. The application of both of the digital communication technology and the SoC design technology to the wireless transfer of the audio signal makes the wireless digital audio communication system better and more reliable, so that the quality of the timbre was assured.First, the thesis gives a description of the hardware architecture of the wirelessaudio signal processing oriented SoC——Calliope SoC designed in the thesis. Alsothe high performance and lower power cost embedded CPU CK510E which is integrated in the Calliope SoC is described too. Besides the thesis analyzes the on chip communication mechanism with the emphases on the AMBA architecture which is used in the Calliope SoC.Then the thesis analyzes the design and implementation of the I~2S and the S/PDIF digital audio interface, and put forward a new implementation of double protocol digital audio interface which is compliant with both of the I~2S and the S/PDIF protocol based on the IP reuse method. The experiment result shows that the implementation of double protocol digital audio interface with the proposed method could reduce 42.4% chip area compared to the implementation without the proposed method. Besides the design and implementation of the forward error correction codec (FEC codec) that is integrated in the Calliope SoC is depicted in the thesis. The experiment shows that the FEC codec used in the wireless system could reduce the packet dropping rate from 7.21% to 4.28% under motion condition, in other words the fault freedom of the system is improved by the use of the FEC codec.Finally the thesis gives the means of implementation of audio codec on the Calliope SoC which uses both the high level program language and the assemble language. At the same time the lowest operating frequency for different audio codec on the Calliope SoC and the power cost of the system under different working frequency was tested and the argument based on the test result is given.
Keywords/Search Tags:system on chip, digital audio, AMBA bus, digital audio interface, forward error correction code
PDF Full Text Request
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