| The speech compression module designed in this paper is used in the railway communication. Recently, with the train speed increased, train will run in a longer time after started .During the running time the driver has to report the situation to the control center. When this operation task is over, the control center will decode the audio data saved within the running time. The audio data saved within the running time will be decoded. If the train had an accident during running time, these decoded data can be used to identify the reason and the time of accident. If we don't compress the audio sampled data, and now, we calculate the storage space for saving the audio data. In the paper, the sampled frequency is 8K Hz, supposed the train will run 12 hour, then, we will collect 12*3600*8000 data. Each of the PCM data coding is 16 bits, so we need about 6Gbit space to memorize these data. This waste lots of storage space. And, with Railway traffic increased, the resource of band-width is more precious, so it is necessary to adopt low-rate speech coding algorithm. And, with the development of digital signal processing a VLSI, we can realize the real-time speech coding on DSP chip. In this paper, the principles and algorithms assumed in the G723.1 codec standard are systematically reviewed. Then a brief introduction to the real-time DSP simulator & emulator and the flow-chart of the DSP algorithms realizing and the primary program optimization techniques according to the given DSP hardware and instruction set are thoroughly discussed, and some tests of the optimization effects are carried out. Experimental results show that the work discussed in this paper well realized the speech codec's optimization and the implementation is done in real-time on DSK. Further research and development directions are suggested for possible improvements of the current thesis work. |
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