The Research And Implement On Peak-to-average Power Ratio Reduction In OFDM System

Mobile communication is one of the hottest technologies in the development of current years, and OFDM, the key of 4G mobile telecommunication, is attracting eyeballs widely nowadays. OFDM has a lot of advantages, for example, it can be against multi-path propagation, inter-code interference and narrowband interference, and it also has a high spectral efficiency. However, OFDM has some drawbacks, the high peak-to-average power ratio is one of them.In muti-carrier communication system, peak value will be overlapping when each carrier joins together, which results in high Peak-to-Average Power Ratio (PAPR). The larger PAPR will demand higher of back-off to power amplifier, which results in the increase of expenditure and the reduction of power amplifier efficiency. Therefore, how to restrain high PAPR becomes a significant problem in muti-carrier communication. Based on the research of PAPR restraining in OFDM technology, a novel algorithm of reducing Peak-to-average power ratio is designed and implemented with FPGA in this thesis.Firstly, this thesis introduces the concept of PAPR and its influence on power amplifier. Secondly, various methods for PAPR reducing have been introduced and compared. In the third chapter, an algorithm of PAPR reducing is designed and the designment of the key module has been introduced. Besides, this thesis analyzes the performance of the PAPR reducing module based simulation. In the fourth chapter, the implement of the algorithm on FPGA has been introduced particularly. The matters be attended to durning synthesis and optimization have also been proposed and the validity of logic design is testified by comparing the results of logic design with the results of algorithm simulation. Finally, the thesis is summarized and the extention of the module has been concluded.