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Application And Research Of Neural Networks Blind Equalizer On FPGA

Posted on:2009-06-24Degree:MasterType:Thesis
Country:ChinaCandidate:Z P GanFull Text:PDF
GTID:2178360245965461Subject:Signal and Information Processing
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In modern communication systems, transmission channel is greatly distorted because of the exist of factors such as channel-fading and multi-path propagation emerges, which severely reduces the performance of transmission channel. Channel equalization technology can eliminate the problem of inter-symbol interference effectively and improve communication quality. But In modern transmission environment, since there isn't any completely linear channel, the algorithms aiming at solving linear channel processing become invalid. There are simple nonlinear input and output relationship between neurons in neural networks. So the neural network and blind balanced combination become new issues in communic -ations signal processing field.The rapid development of technology in integrated circuits and the programmable logic device support neural networks blind equalization applications. This dissertation consists of designing and implementing a blind equalizer system that is compatible with neural networks blind equalization algorithm on FPGA. The main works of this paper can be summarized as follows:(1) after optimized variable neural networks blind equalization algorithm in theoretical level and achieving specific levels, it can improve the efficiency of the hardware.(2) This paper design neural networks blind equalizer based on floating -point operations. This equalizer consists of serial sub-blocks. So every sub-block is independent in function with others. It can be altered to adapt different algorithm by means of change the corresponding sub-block. This way facilitates studies henceforth.(3) Design and complete experimental core board based on micropro -cessor EP1C12Q240C8 of ALTERA corporation Cyclone series.(4) This paper design test platform which includes a signal generator, display controller and counter of error, at the same time variable step-size constant modulus blind equalization algorithm is verified. Platform outputs experimental results of emulated system as data and graph. The results show that the error rate, convergence speed and channel tracking capability preferment well in the design of the blind equalizer.
Keywords/Search Tags:feed forward neural networks, blind equalization, FPGA, float, test platform
PDF Full Text Request
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