| Usually, a crystal oscillator or rubidium is used in the Time Unit System equipments as a clock frequency standard, but its drawbacks of long-term stability do not satisfy applications because of its aging or some other reasons. With the rapidly development of science and technology, the precise time and frequency have been applied to monitoring and control, navigation, communications, electricity, transport fields, etc.. The demands in high precision time and frequency standards are becoming higher and higher. So, designing an automatic adaptive frequency system (Disciplined Clock) becomes very necessary.Analog or semi-digital system are used in the traditional Disciplined Clock system ,which has some shortcomings such as high costs, the impact of environmental factors, debugging and modeling difficultly and so on. Based on the basic principle of time and frequency of disciplined clock technology, the traditional disciplined clock technical shortcomings can be overcome with a new digital disciplined clock system. This new technology within a high-resolution phase_dectector using pseudo-random code, furthermore in which a crystal model is embedded into the PLL with the Kalman filter technology, can improve the accuracy and stability of the time output of equipment .A disciplined clock system based on the FPGA and ARM is designed and realized with the new technology presented above in the dissertation .It can easily track external 1pps signal. A wonderful anti-noise performance can be obtained in this system because of its full digital structure. Thereby, it can improve the accuracy and stability of tracking 1pps signal.Finally, according to the needs of time synchronization in electric power system, a kind of GPS/BD dual-system to be as a master clock is introduced by using the digital disciplined clock, as well as the Allan-variance of output is measured and analyzed, the result shows this kind of digital disciplined clock can improve the stability of the equipment's output. |
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