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Digital Down Converter Designing Based On FPGA

Posted on:2008-11-28Degree:MasterType:Thesis
Country:ChinaCandidate:Y L LiuFull Text:PDF
GTID:2178360245497879Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
As a kind of high-density special digital integrated chip configured by user, Field Programmable Gate Array (FPGA) has many advantages, such as miniaturization, low power dissipation, programmable logic, digitalization and velocity. FPGA has developed into important device for signal processing from a kind of flexible platform for logical design, since it's flexible and high-speed. FPGA has been applied extensively in many software radio productions.In this paper, a programmable digital down converter (DDC) applied on wide bandwidth digital IF receiver is design and implemented by FPGA. The digital down converter can translate digital IF signal into baseband, and decimate the sample sequence. Using Top-Down design method, the whole design is divided into many units implemented respectively and organized to module library. When applying DDC on receiver, these function modules are selected, configured and optimized to satisfy the wireless system demand.Firstly, this paper shows typical software radio constructions, the location and functions of digital down converter in receiver, basic theory knowledge: bandpass sampling theory, numeric quadrature mix theory, and multi-rate signal processing theory.Secondly, this paper shows the design and implement of digital down converter. DDC use the configuration of numeric quadrature mix. Local oscillator generates two quadrature signals of sine wave and cosine wave which mixed with sampled signal. The signal after mixed passes two cascaded integrator comb filters which decimated multiple can been changed, compensation filter, half-band filter and two decimators, and channel shape filter at last. Local oscillaotor is implemented by direct digital frequency synthesis. Half-band filter and programmble FIR filter are implemented by distributed arithmetic. Compensation filter is implemented by interpolated second-order polynomials. Each module is simulated and analyzed.Finally, each module is generated schematic and connected to top digital down converter. Digital down converter is simulated and fully validated.
Keywords/Search Tags:software radio, digital down conversion, distributed arithmetic
PDF Full Text Request
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