| The UHF RF receiver can be widely used in family security,automatic control, automobile guard and RF ID system.There is no related work done domestic and most of the chips are implemented with BiCMOS process in other countries,so it is significant to design a low-power-consuming low-costing high-integrating CMOS UHF receiver.This paper analyzes telecommunication standard,does the system design and research of UHF receiver.The system simulation software of ADS,APPCAD and GENSYS are used to distribution the parameter and do verification.The key modules of the system of both circuit and layout are designed with TSMC 0.18um 2P6M RF/Mixed-Signal CMOS process.After researching many papers,these jobs have been done:1)With the requirement of ETSI-300 220 and FCC PART 15,using Okumura model to analyzed signal path,a ASK low-frequency receiver has been introduced. The parameters have been distributed and the system simulation has been done.2)Introducing a algorithm of distributing the parameter for minimum powerconsuming. Define Dhefine the VIP 3i2/(?)ni2 as circuit equivalent dynamic range and verify a proportional relationship between power consumption.Determine the formula to minimize power consumption and applied to the RF front-end design.3)Finishing the design of a source coupled cascade LNA with simulation result of 1.2dB noise figure,16dB power gain,-9.8dBm IIP3.Finishing the design of a dual balanced Gilbert Mixer with improved feedback resistor and LPF load of 6.5dB gain, 12.8dB noise figure,-6dBm IIP3.4)Finishing the design of a five stage limiter amplifier with RSSI function to realize ASK demodulation of 80dB maximum gain.5)Finishing the design of high sensitivity peak detector and Cascade comparator, with 2.3us rise time whose delay time is from 3us-120ns when Iref is in different from 10uA to 3mA.6)Finishing the layout design including floorplan,key module design and verification.Considering the issues such as current density,parasitic,symmetry, antenna effect and ESD. |
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