The Design Of MAC Module For Embedded Ethernet Microprocessor

The design of MAC (Media Access Control) module for embedded Ethernet microprocessor based is mainly described in this dissertation.In this paper, the background of this project and its meaning are introduced first. Scendly the protocols of Ethernet (IEEE802.3) and TCP/IP protocols are introduced. After that the arcitechture of the 100M Embedded Ethernet Microrocessor is deeply researched. Then the master plan, including the architecture of the system, the module dividing, and the design method are introduced. And a new arcitechture that MAC module is in charge of the distingwishing frames of different net protocols and caculating the checksum field of TCP/IP packets is offered.Solutions to the key functional modules of MAC layer are given, such as checksum_gen module, checksum_veri module, rx_mac module, tx_mac module, maces control and interface between PHY/MAC and host, arithmetic for CRC, CSMA/CD and HASH Table etc. It is well known that the mostimportant process in system designing is how to define each module and how to coordinate and interconnect these modules. According to the TOP-DOWN method, interconnection of each module and the interface signals are also defined to communicate between each other, while the internal timing of the module is controlled by finite state machine. In the down level, verilog hardware description language is used to describe the base circuits. It should be pay more attention to hardware resource spending and c oncurrent executable ability of the Verilog Language, which could make the design closed to the hardware working way. After verification the circuit was proved functionally correct and totally matches the system requirements.