Dissertation Template For Master Degree Of Engineering In Face Detection System Design Based On FPGA

After fingerprint identification, voice identification, face recognition has been focused more and more due to its security, stabilization and facileness. As a necessary first-step in face recognition systems-face detection, with the deeper research and expanding implementation, it has great application value in video meetings, image detection systems, surveillance systems, intelligent human-computer interfaces and so on, and develops quickly.FPGA (Field Programmable Gate Array) has represented its flexible characters since its appearance. Now the functions of FPGA have been improved deeply and it is being used in more and more fields. Customers can make more changes in FPGA according to their needs. They can design their own modules and they can upgrade the control system by themselves. The flexibility of FPGA reduces the cost of the whole design and FPGA design is becoming an indispensably method in Electronic Design Automatic.This paper designs from the algorithm of face detection, method of system design based on FPGA and the technique of IBM Coreconnect. After training the cascade, Floated-point to fixed point conversion(FFC), hardware acceleration, the face detection get the real time on Virtex II Pro of Xilinx. Below I list the key points of this thesis:1. Analysis of algorithm: for the preciseness of detection rate, this paper adapts a method of face detection based on Adaboost presented by Paul Viola and Michael J.Jones. Complex computations of integral image and features value are fit for the hardware design. Meanwhile, I need to make sure the bottle-neck of speed in the algorithm.2. HW/SW partition: this step considers the resource status, cost, time to market and so on. The V2P(Xilinx Virtex-II Pro) has PowerPC, extended-Memory, I/O, Bus, etc. And then analysis the algorithm and partition the module for accelerating.3. FFC: As Adaboost algorithm contains large number of floating-point computations, we used FFC in the paper as follows. Under certain accuracy, extract exponent and mantissa of floating-point data, and then shift the mantissa, thus converting a floating-point data to an n-bit integer.4. Optimized cascade training: prevent a new training method to make some improvements to enhance partition ability and decrease the number of feature.5. Finally, verify the whole system. Experimental results show it can detect faces at a 17fps speed. It obtains the high hit rate and the low false detection rate.