Research And Implementation Of The Microcontroller Of X Stream Media Processor

With the extensive application of computers in various fields, stream applications gradually become one of the main workload of microprocessor. Unlike the characteristics of conventional programs, Stream architecture is becoming a hot topic in microprocessor research. The thesis subordinates to the development of X processor that is a new type stream processor.The main goal of our work is the design and implementation of microcontroller based on stream architecture. The microcontroller is the kernel level's controller of X processor, responsible for passing parameters from/to the Stream Controller, loading microcode into its microcode store, and most importantly, controlling the execution of the micro programs on the arithmetic clusters.We firstly introduce the X processor's architecture; simply describe every module of the X processor. And then, we introduce the pipeline of the microcontroller, based on the different type of instruction, there are three types pipeline. During the FETCH stage, the VLIW instructions are fetched from the SRAM, limited by the SRAM's frequency, we let SRAM working in the half-frequency. In order to all for SRAM to work in the half-frequency without a performance penalty, two instructions are read at one time from the SRAM array, The first of these instructions is passed directly to the instruction decoder, the second is stored in a register, so that, it can be decoded in the next clock cycle without accessing the SRAM array again.Furthermore, because of the strictly limited micro code in X stream processor, a software pipelining realization mechanism which releases the storage space pressure by concealing the "fill in" and "finish up" parts seemingly is presented, as well as the hardware implementation.In the end, the correctness and validity of all these techniques get proved by running loop programs on the all-purpose testing model for X stream processor. The microcontroller is adopting in the X stream processor implementation, and sound effect is attained.