Design And Implement For LEO Satellite Transceiver

This dissertation studies on the solution of digital pilot transceiver architecture, which is used in terrestrial station of LEO satellite communication system. And the solution was implemented in the hardware circuit. Especially, the research about synchronization is the key part of the dissertation.Chapters are arranged as follows:Chapter 1, as the outline, illustrates the development of satellite system, the research background of key technology and the main work of the dissertation.In chapter 2, signal acquisition is detailed presented. The all modules in acquisition subsystem are analyzed and simulated. Compared with the general techniques, a new acquisition policy is proposed. Not only the detailed modules, but also the performances about the policy are demonstrated.Chapter 3 introduces the basic theory of Phase-Locked Loop (PLL) and the three loops (FLL, PLL, DLL) which are applied for the synchronization of DSSS signal. The main work in this chapter are introducing the detailed techniques of the loops (architecture, algorithms, performance, etc.) and making simulation as plus.Chapter 4 introduce the hardware of the transceiver implement, the main ICs' feature and the receiver's work flow, and the comparison between the test result and the simulation result.At last, there is a summary of the research work in this dissertation. After the summarization, some suggestions are proposed to improve the system's performance well.