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The Design And Realization Of System Coprocessor In A 64-bit High-performance Embedded CPU

Posted on:2008-01-10Degree:MasterType:Thesis
Country:ChinaCandidate:Z JinFull Text:PDF
GTID:2178360242456851Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The System Control Coprocessor (CPO) is an integral part of the MIPS CPU. By a series of privileged registers, it can note the status of the CPU and support some privileged operations. Its most important function is to handle the exceptions. And its other functions include the operation mode switch and the translation of virtual address. From the view of hardwire, the CPO behaves like an operation system for an application program.The design of the CPO of a MIPS R4000 architecture CPU is presented in this paper, including the full-custom physical design, the precise exception handling design and the virtual address translating design.In the detailed physical design, standard cell design method was used in the control unit and the full-custom design method was used in the data path section. The emphasis was put on the full-custom circuit and layout design in the data path section of the CPO, to achieve better speed and lower power consuming. Author simulated circuit and verify layout in virtue of EDA tools.In the design of precise exception handling, the exception-handling pipeline has been optimized and the delay of critical path was greatly shorted. And to optimize the register updating method, there was trade-off between the die size and the speed.
Keywords/Search Tags:System Control Coprocessor, Precise Exception Handling, Pipeline, Full-custom design
PDF Full Text Request
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