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FPGA-based Embedded System Speaker Recognition Algorithm Research And Implementation

Posted on:2008-01-18Degree:MasterType:Thesis
Country:ChinaCandidate:F Q ChenFull Text:PDF
GTID:2178360215990446Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Speaker Recognition refers to the speaker of the speech signal processing to automatically identify the speaker's identity. The speaker recognition system is based on the FPGA-based embedded system above, using vector quantization. It includes three main modules: feature extraction, pattern matching and hardware platforms. In feature extraction process, it will be extracted from the voice signal which can reflect the personality characteristics. As well as extraction algorithm to speed as a priority target for optimization. In pattern matching module consists of two parts: the codebook generated and identify. Hardware platform module will use a SOPC system, to complete the acquisition of voice signal, human-machine interface and functions, and use of FPGA parallel processing features of the pattern matching algorithm to speed up.This paper first speech in the time domain signal processing methods on the basis of the study, the common feature extraction characteristics, focus on the MFCC. Then, in the mainstream pattern matching method based on the study focused on the vector quantization, and the introduction of the vector quantization distortion of the principles and measures on the basis of VQ study optimal code for the design of the algorithm-GA. Then, the use of the system based on SOPC hardware platform for the design, and design the hardware and software system interface. Finally, the paper design a set of algorithm which used MFCC for parameters, genetic algorithm for codebook design, vector quantization method for pattern matching, based on the embedded FPGA platform realized. Algorithm uses a series of software and hardware optimization, and presents a new method of calculation through the actual hardware platform experiments reached in the codebook of the increasing distance has a good effect.The system uses MFCC parameters to enhance the performance; genetic algorithms codebook design and the use of K-means clustering algorithm to accelerate the convergence speed codebook; Used mean distance was more stable threshold, which improve the rejection rate. The system has some advantages include high recognition rate and the rejection rate, high-speed calculation, the low-error rate, lower hardware requirements, etc. The system has certain degree of practical ability.
Keywords/Search Tags:speaker recognition, Vector Quantization, MFCC, Genetic Algorithm, Embbed System, FPGA, SOPC
PDF Full Text Request
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