Design And Implementation Of Speaker Recognition System Based On FPGA

As a biometric identification technology, speaker recognition can verify the identity according to the test voices. Because of its unique convenience and economy, speaker recognition technology has attracted the world’s attention and has an abroad application prospect in authentication and information security.At present, the study on speaker recognition system mainly focused on the robust of algorithms and the realization of platform. MFCC and recognition algorithm based on VQ are relatively simple and have high robustness, which are widely used in speaker recognition tasks. The implementations of speaker recognition systems which have existed are mostly dependent on computer software or hardware platform based on DSP. The real-time and other requirements of this kind of systems will face significant challenges with the growing database.For real-time problem, this paper presents a solution that makes the FPGA as the hardware platform. This program uses the speaker recognition algorithm based on MFCC and VQ. The system consists of five parts:Signal Acquisition, Endpoint Detection, Feature Extraction, Training and Identification. Signal Acquisition Module has completed the control of WM8731audio codec chip through I2C bus. VAD module has designed and implemented the double threshold algorithm based on short-term energy and short-term zero crossing rate. In Feature Extraction Module, the paper designed and implemented the time extracting base2FFT IP Core and logarithmic IP Core based on2. Codebook training has been completed by the LBG algorithm. Identification module implemented the VQ recognition algorithm based on square error Euclidean distance measure.The experiment results show that the time-consuming is15.932ms on the4codebooks and50MHz-clock system, the identification rate is93.3%on the12codebooks system. This kind of design improves the system’s recognition speed, which is an effective program to solve the real-time problem.