The Research On Mixed-signal SoC Test And Design For Testability

With the rapid development of microelectronic technique, integrate circuit and system become more and more complex. Traditional test models and test methods are not competent for the times'require on account of the gigantic test expense. In the field of AMS(Analog Mixed Signal), due to the circuit form and peculiarity of the signal, test theory falling behind relatively. Especially present, Soc (System on chip) design and deep sub-micron process have brought the new problem. Test will be the bottleneck of development of SOC system. This paper research the mixed-signal test based on test performance, alleviating the burden of ATE (Automatic test equipment) and the design for testability.First, this paper research universal IC testing process, comparative analysis the mixed-signal test procedures. Basing on process, we analysis testing simulation model, testing algorithm for the generation, and also discuss the modeling of high hierarchy in mixed-signal circuit. The key method to the SOC test is the mixed-signal testability synthesis. Further more, this paper put high importance to the design for testability such as scan test, BIST (Built-in-self-test), Boundary scan test for digital system and mixed signal system. Test vectors generator, circuit under test, character analysis system of built in self test were realized in one chip with FPGA. The method is effective and high speed. Then we discuss theΣ? A/D converter, basing on each model, we construct a second-order colored noise and a fourth-order white noise SC (switched capacitor)Σ? modulator. Simulation results demonstrate the validity of the models proposed. Also we analysis the BIST scheme for A/D converters, a sigma delta modulation based signal generator is presented which can concurrently produce analog sinusoidal test stimuli and digital sinusoidal reference signal on chip.At last, This paper present the hardware and software design of auto test equipment which can locate the diagnoses in PCB and IC .The method of a sort of uniform AMS IC DfT technique with low test cost and high fault coverage will meet the need of further development on IC design.