The Research And Implementation Of Stream Register File

With the expanding area of compute application, stream media and scientific computing is becoming an important kind of application of processor. Stream architecture which aims at media processing and scientific computing is a new high performance architecture. X processor is an implementation of this architecture.It is well known that the gap between processor and memory is becoming larger and larger and the bandwidth has become a bottleneck of nowadays computer architecture. The memory hierarchy of X processor which aims at releasing the problem of bandwidth of stream application efficiently is comprised of local registers, stream register file and off-chip DRAM. Stream register file is a large on-chip memory and one of the important function units. It can buffer streams which are needed or generated by the kernels and streams which are transferred between the stream register file and others units. The thesis focuses on stream register file.First of all, the architecture of X processor and the programmable model are given. And then the architecture of stream register file is presented and the differences between Cache and Stream register file are analyzed, as well as the stream scheduling which makes stream register file managed efficiently. Then, the important technology in the hardware implementation of stream register file and the verification, simulation, synthetic result and performance analysis of stream register file are presented. At last a stream register file with indexed access is researched.The simulations of three applications display that stream register file can supply enough bandwidth for the clusters. The stall proportion resulted kernel stalls which created by stream register file is less than 1%.The synthetic results display that the frequency of steam register file can be up to 500MHZ.The results of the tape-out display that X-processor can work correctly and the goal of the design is reached.