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Study And Implementation Of Stream Instruction's Issuing Mechanism In X Processor

Posted on:2007-10-14Degree:MasterType:Thesis
Country:ChinaCandidate:Z Y LiangFull Text:PDF
GTID:2178360215969955Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
With the extensive applications of computers in various fields, stream applications gradually become the main workload of microprocessor. Unlike the characteristics of conventional programs, Stream architecture is becoming a hot topic in microprocessor research. The thesis subordinates to the development of X processor that is a new type stream processor,which is divided into stream level and Kernel level in programming mode.This article studies the mechanism of issuing stream instructions.Based on the study of stream applications, we put forward the stream-level instruction set. There are thirteen instructions(stream-level) that have unfixed length,including control word read-write, stream transfer, synchronization and computation. Software on X processor makes of stream instructions dynamically. After satisfying the transmission conditions, stream instructions are send to X processor to carry out orderly.The paper presents the dynamic productions of stream instructions in host Processor and shows how the host processor dispatched the stream instructions to the X processor. This paper studies the characteristics of executing stream instructions and implements the stream controller, which using for issuing stream instructions in X processor. Stream controller adopts the explicit scoreboard structure and issues stream instructions dynamically. Especially the instruction queue in stream controller supports instructions to enter,issue and leave the team at the same time.After module-level, pipeline-level and system-level testing, we also verified the design of stream controller which further ensuring the correctness of design. The results of synthesis show that stream controller's operating frequency is over than 500MHz and the design satisfies the design requirements.The issue of stream instructions is not the system performance bottleneck.Lastly,Aiming at the poor-efficient use of instruction queue in stream controller, this paper analyses the causes of this situation and further advances some better schemes.
Keywords/Search Tags:stream architecture, stream programming, issue instructions, stream controller, scoreboard
PDF Full Text Request
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