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Research Of Long-distance Video Transmission System Based On FPGA

Posted on:2008-05-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y WeiFull Text:PDF
GTID:2178360215963979Subject:Power electronics and electric drive
Abstract/Summary:PDF Full Text Request
With the development of the video processing technology, displaying real-time image technology becomes the core of research subject, especially in some special situations, such as the explosive, poisonous, radiant, or dangerous situations. Operators can't use the computer to capture data at the scene, so they have to operate in the safety room far from several kilometers even several dozens kilometers. For capture high-speed video signal in the distance, long-distance high-speed image capture control and high-speed fiber optical communication system must be established.At the present time, the universal image processing and transmitting system adopts the design scheme of "DSP+ASIC" , which structure is complex and processing speed is low. In the paper, FPGA is adopt as the control core instead of "DSP+ASIC" to realize long-distance video transmission. Under the control of FPGA, video coding chip SAA7111 is used for image capture. Under the control of FPGA, data compression is realized based on 5-3 integer lifting wavelet transform. Under the control of FPGA, data transmission and data receiving is realized based on the high-speed serial chip of CY7B923. Under the control of FPGA, PCI bus communication is realized based on the bus chip of PCI9050. The whole image data transmitting system is designed under the control of FPGA, using the VHDL language under the Quartus II software. And most of the hardware design is simulated, and the simulating result is ideal and consistent with the design. The system has the following obvious characteristics:(1) In the sending subsystem, all digital logic control and image compression are integrated on one FPGA chip. It can minimize the system size and improve the system density of integration.(2) The image compression of 2D discrete wavelet transform is designed and realized on the FPGA, selecting 5-3 integer lifting wavelet. The lifting process adopts folding structure, which saves the system hardware rescource. Meanwhile, compared with DSP processor of the "DSP+ASIC" project, this wavelet transform project with FPGA can improve the speed, in which its bit width can be set freely. And VHDL is transplantable and more universal. (3) For data capture, the ping-pong operation is used to the double external memory for storing or taking away the image data. It can be guaranteed that the image is captured in the entire frame and is transmitted stably and continuously, saving the storage space and improving the speed, which is better than the project with the single memory.Finally, the work what has been done in the paper and the future developing direction are summarized. At the same time the deficiencies and the requiring improvement of the system are brought forward at present in the paper.
Keywords/Search Tags:Video signal, FPGA, Image capture, Image compression, Wavelet transform
PDF Full Text Request
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