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The Implementation Of FPGA-Based Fingerprint Matching Accelerator Interface Module

Posted on:2008-05-11Degree:MasterType:Thesis
Country:ChinaCandidate:W L LiFull Text:PDF
GTID:2178360215482503Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Nowadays, the identification and authentication are widely used in various fields. Fingerprint is playing a very important role in the biological identification methods. As the scale of fingerprint database increase dramatically, a two-levelmatching system is chosen in our system. The hardware is used to perform coarse fingerprint matching and software is used to do fine matching.FPGA-based hardware accelerator discussed in the thesis is designed as a coarse matching unit in our two-level fingerprint matching system. It's designed for running on one million-people fingerprint database and aims to do matching at the speed of 10,000 fingerprints per second.Three parts are included in the thesis. Firstly, the PCI bus interface implementation methods are given. Secondly, some logical designs including PLX9054 localbus interface module and some sub modules are discussed in detail. At last, the PCB implementation of the fingerprint matching accelerator is described...
Keywords/Search Tags:fingerprint matching, fingerprint accelerator, PCI, PLX9054, FPGA
PDF Full Text Request
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