Design Of Discrete Hopfield Neural Network Based On Floating-Gate Technology

Artificial Neural Network(ANN) is a new science of information processing.It acts as a transition from conventional information processing to human brain.Currently,the research area is very extensive.For example,the struction of various network model, principle analysis ,hardware realization or internet application exploiture.A number of neural network ahgorithms have been proposed,but their implementation was mostly in software programs running on digital computers.So it is impossible to fully reveal the excellence of ANN.In order to explore real-world applications of neural networks,their hardware implementation on silicon chips,with high integration density and on-chip self-learing capability,is critically demand.As a kind of new and high-functionality technology, floating-gate technology has been paid much attention to recently.The neural MOS transistor fully develop the floating-gate technique.The device is a multi-input MOS transistor which accepts multiple input signals,calculates the weighted sum of all input signals,and then controls the on and off states of the transistor.This function is exactly what is needed for an artificial neuron model to work and the device is no doubt most suitable to construct neural networks.Some conception and principle about floating-gate technology and neuron MOS transistor that are based on floating-gate technology are presented detailed in this paper.According to neuron MOS transistor's equivalent capacitance model, the PSpice equivalent circuit model of neuron MOS transistor is completed by the ABM(Analog Behavioural Modelling) function of the PSpice simulation software. The efficiency and accuracy of this model is verified by plenty of experiments.Several circuits that are constructed by neuron MOS transistor are analysed in detail to demonstrate the advantage of the proposed transistor. A kind of discrete Hopfield neural network has been designed directly by neuron MOS transistor.Finally,the neural MOS transistor winner-take-all circuit is proposed to optimize the association result of discrete Hopfield neural network.