Implementation Of JPEG Encoder Based On TMS320C6416

In the information society, the information, especially the information of the images and the videos is on the increase with a velocity of exponential magnitude. And it is too large to store or transmit. So the image_vedio compression coding is becoming a focus in the communication research.This paper is based on the item of real-time compression and transmission for large image in an engineering application, which demands real-time compression and transmit to a image of 4008*2672 size at a certain compressing rate. Because compressing rate is not asked very high, we choose the JPEG image compression standards, whose algorithm is very simple. But higher demand for real-time, so we choose the TMS320C6416 chip of TI company with higher CPU frequency, and further improve coding efficiency through parallel optimization and assembly language.Based on the analysis of JPEG, the encoder is implemented on TMS320C6416 with paralleling arithmetic and optimization methods. More specifically, this dissertation includes following contents:Firstly, based on the analysis of JPEG, the effect on coding efficiency by the key modules of JPEG is analyzed. Secondly, the hardware structure and the software development standards of TMS320C6416 are analyzed, the paralleling arithmetic and optimization methods of JPEG are studied. Thirdly, Based on the configuration features of TMS320C6416, the encoder of JPEG is implemented by using assembly language.The JPEG encoder that we have implemented on TMS320C6416 has a high processing speed. It can compress 2 frames of images per second, the size of the images is 4008×2672, when the CPU frequency of TMS320C6416 is 600MHz.