Research Of Some Package Issues About Micro And Nano Device

Micro and nano device is the inosculated production of the micro and nano electronics and mcromechanics. It combines the silicon mcro process technology of IC fabricated technology and micromachine process technology of industry to form integrative of machine and electricity, even to form integrative of photon, machine and electricity. The development of micro and nano device is more mature at present, but a lot of chips did not be the product to get the actual application, its main reason is that it did not resolve the package problem. The package reliability of the device is absolutely necessarily.The performance of micro and nano device can be achieved by measure method or computer simulation. Generally speaking, the measure method is achieved after produce. Its design period is too long, rigor to the equipment, and it is hard to measure the complicated 3D device. However, the computer simulation can go with the design period, its process is simple, and cost less time. So in this paper, we use the finite element analyse (FEA) software ANSYS to simulate the calorifics and energetics of some micro and nano device. Example as follow:1, Simulation and analyse of thermal conduction of micro and nano device by ANSYS, based on the result, we improve on some of the device.2, Building model of single and multi bump in the BGA, and then simulated the thermal stress. It also is done in the Flip-Chip with underfill. Finally, change the size of the model can change their stress.3, Simulation the thermal stress of some Lead-Free material, and discuss the IMC which is produced in the reflow.4, Discuss some electrics problem in the package, such as RC delay,interconnection pitch, Interconnection area ratio, inserted loss, and soon.5, Study and check the QWIP and FPA experiment data by DELPHI and EXCEL.