Research Of Multibit Modulator And Filter Technique For Audio ∑-△ DAC

With the fast development of the intergrated circuit technology, people have been laying much greater emphasis on the precision of D/A and A/D converters which are used in the data conversion and signal processing. Compared with other types of D/A converter, this kind of D/A converter which based on the technology of oversampling and noise shaping can reach very high resolution (exceed 16 bit) without any analog device of high precision and large scale. So they have been widely used in many aeras such as high quality audio device, high precision measurement and long-distance communication.In this paper, the multibit modulator and filter technique are studied, which are used for the high precision audio system. The oversampling ratio of the interpolation filter is 128. Because of the nonlinear and instability of the high order Σ-Δ modulator, the order of the modulator is choosed as 4 order and with a 3-bit output signal. In order to reduce the mismatch error of the output level, we adopt the DWA algorithm.By learning experiences and methods from many other papers, we presented the lineary analyse module and the design flow of the stable high-order high-resolution Σ-Δ modulator. By the simulating of the Matlab, we design the Σ-Δ modulator with 4 order and 3-bit output. The SNR of the passband exceeds 152dB, so the modulator can restrain the noise in the passband effectively. And the implement of the modulator only needs adders and shift registers,which economize the power.The interpolation filter is implemented as a cascade of two halfband filters and four CIC filters. We adopt the Tapio Saramaki FIR filter design algorithm to design the halfband filter. Compare with the traditional filter design methods, this algorithm reduces about 40% of the number of the adders and shift registers. Then we optimize the structure of subfilters by hardware reusing. We also compares the CSD and MSD representations. With the filter coefficients MSD coded, the interpolation filter is multiplier-free, so the hardware scale is reduced.The internal 3 bit D/A converter employs switch capacitor conversion, which needs 7 levels by the temperature code. With the use of the DEM algorithm, the mismatch error of the capacitor cells is modulated to the high frequency area. So we design the circuit which can implement the DWA algorithm, and the mismatch noise was reduced. As a result, the Σ-Δ modulator and the interpolation filter are implemented and verified by Xilinx Virtex II series FPGA. For the input audio signal with 44.1KHz, the inband SNR of the 3 bit output can achieve the requirement of 24 bit data transform.