Design And Implementation IP Core Of PCI Bridge Base On Network Processor

PCI (Peripheral Component Interconnect) bus is one of the most popular buses used in multimedia filed. In recent years, because of its abundant functions and excellent performance, PCI bus has not only been the first chosen for PC local bus, but also been the first chosen for peripheral devices bus of advanced Network Processor. Therefore, designing the bridge chip between PCI bus and other kinds of buses becomes more and more challengeable for ASIC engineers.This thesis is supported by the national defense pre-research project "The Research and Development of Network Processor chip". And this thesis designs an IP Core with PCI-to-C_BUS bridge translation function, which is a key component of the North Bridge in the Network Processor system architecture. The function of the PCI-to-C_BUS Bridge is to translate the PCI bus protocol to C_BUS bus protocol. Such translation makes the communication between PCI devices and Network Processor possible.The main research works in this dissertation include as the following.1. Research on Network Processor system architecture and study of PCI local bus specification;2. Definition of PCI-to-C_BUS bridge architecture and design of its function modules, such as the internal finite state machines, logic of PCI and C_BUS interfaces , decode module etc;3. Design of FIFO and its controller;4. Simulation of PCI-to-C_BUS bridge implementation by ModelSim, and analyzing timing.This dissertation has contributed to the research on the PCI local bus, and provides a solution to the application of Bridge Chip designing for Bus Switch in the Network Processor system.