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Research Of IP Library Building Of DMA Module In 32-bits Floating-point DSP

Posted on:2008-05-05Degree:MasterType:Thesis
Country:ChinaCandidate:X F WangFull Text:PDF
GTID:2178360212474951Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In high speed SOC chip of disposing of real time digital signal, there is DSP as main processing unit. Therefore, we developed compatible C32. C32 is chiefly used in embedded system, which possesses the character of real-time. This paper concentrate on IP core design of DMA which is one part of DSP.DMA controller is a programmable peripheral equipment which can transfer data block between different memory units in case of not interrupting CPU operation. DMA controller has dedicated on-chip address bus and data bus for DMA transfers, which are controlled DMA register. DMA can run constantly or can be triggered by exterior interruption (INT3-0),interior interruption (timer and serial port), at the end of transfers,send interruption signal to CPU.According to DMA function, I first design DMA behavior and detach it to clock-driver cell which can separate control signal from data signal, and design structure which consists of control block,data channels,address channels.According to TOP-DOWN design method of digital system, I accomplished FSM,controll logic of operation,operation cell,comparer cell and interruption cell. Finally, i describe DMA and simulate it with verilog HDL in RTL (Register Transfer Level), which result can satisfy systemic function.
Keywords/Search Tags:DMA, Peripheral Equipment, Verilog HDL
PDF Full Text Request
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