Design And Realization Of Silicon-based Coplanar Waveguide And Analysis Of Its RF Capability

With the development of military and civil communication, large numbers of microwave passive devices which with planar structure and high integration rate, low loss and also can integrate with the signal processing circuit together are needed. In MMICs, the loss of transmission line and inductance which fabricated in low resistivity silicon (p=1²0Ω·cm) increased by the frequency. However, the high resistivity (p> 1000Ω·cm) has become the basic substrate material in MMICs.The most important and basic transmission line is coplanar waveguide (CPW), which has been widely used in microwave circuits.Based on referring to many papers, this article using the simulation software HFSS to simulate massive CPWs with different size and characteristic impedance is about 50 Ω. By analyzing the losses and the electric&magnetic fields, choose and design six different CPWs, with two kinds of signal size: 39μm&44μm, and with different gap size. Fabricated these CPWs on oxided LR-Si, oxided HR-Si, and SOI substrates, tested the insert losses of them are: -13.6dB, -2.73dB, -3.9dB. And the losses of CPW on the three substrates are decreased by the signal and ground gap increased. The test results are accord with the simulation results.Based on the experiment, we test the Si-SiO₂ system charges in the oxided HR-Si are positive charges, the density is 4.8×1010/cm2 by C-V analysis.Fabricated CPW on three kinds of HR-Si, they are HR-Si, oxided HR-Si, etched oxided HR-Si substrates, the insert losses are -0.99dB,-2.73dB and -1.16dB in 20GHz, so the etched oxides are 1.57dB lower than have not etched.At the same time, when CPW fabricated on oxided HR-Si and etched oxided HR-Si, a bias voltage on CPW, the insert losses are changed when the voltage from -20V to +20V in 20GHz.To the first one, the loss is lowest when voltage is -14V; To the second one, the loss from -1.1dB to -1.25dB, when the voltage from -20V to +20V.This article research the tested data, based on the E&M theory and CPW theory, analyze the HR-Si substrate model. We can conclusion the ground current ratio direct ratio to the gap by CPW effective RLCG π model. And conclusion the parallel conductance expression of the HR-Si, oxided HR-Si, etched oxided HR-Si substrates, and analyze the capacitance to conclusion the parallel conductance: HR-Si etched oxided HR-Si, oxided HR-Si.This conclusion is accord with the losses tested in experiments.