Research For Digital Intermediate Frequency Receiving Technology In DSSS Communication System

Spread spectrum techniques have the excellent characteristics of being accurate, secret, concealed and to reject interference. Direct sequence spread spectrum (DSSS) and despreading first structure is most advantageous of all kinds of spread spectrum techniques. It has the capability of rejecting interference, the ability for long distance and is very reliable.Some critcal receiving techniques are presented in the paper.The 128 bit M sequence and QPSk modulate method is implemeted in the receiver.With the fast development of microelectronics and Electronics Design Automation (EDA) techniques, the programmable logic device has become new strength in the field of digital signal processing by high speed and quick and also flexible development. This dissertation focuses on the problems concerning the Stratics FPGA implementation of intermediate frequency processing module of the receiver.The paper reviews the mathematical model of DSSS system and analyze its Capability. Then , it designs the transmitter of the DSSS system and analyzes its system structure.Some algorithms of PN code and carrier synchronization are presented in this paper. Through comparison and practical demand, a algorithm of a base-band for digital receiver of DSSS with zero-intermediate frequency is put forward. PN code acquisition and tracking algorithm, carrier demodulation algorithm are described in the paper. It improves function of PN code synchronization by multi-correlation acquisition and time division multiple single correlator tracking. It reduces the complexity of carrier withdrawing algorithm by using soft costas PLL based on sign function. The simulation express that this method has simple algorithm, low false probability, strong ability of suppressing interference and the ability of fast synchronization in low dynamic environment.The paper gives the implement of the acquisition module , tracking module and carrier demodulation module in FPGA.The hardware design of the whole system and the test results in the system are presented in the paper. It is seen that the plat has stable performance, high activity, small size, and can be easily produced and flexibly updated.It is also fit the demand of the system. After proper treatment and coordination,the design is easy to convert to DSSS receiver product.It could be abroadly used in wireless communication area.