Compiler-based Improvements To Register Allocation Strategies

Recently, power not only limits the working time of laptops, but also blocks the further improvement of processor's performance and the design of high-performance computers. Meanwhile, with the computer's popularization, the energy that computers consume is too huge to be ignored. So, the field of low-power is becoming a hot spot, and people have advanced a lot in different aspects with tolerable drop of performance.Reducing energy consumption of computer systems through software optimizations can well compensate the additional cost of assistant hardware. Compiler-directed reconfiguration of the hardware sources or tuning of the parameters of the hardwares can reduce the wasted energy consumption efficiently, such as dynamic voltage scaling(DVS) and turning off unused system units(TOSU) and so on. Many traditional optimizations such as register allocation optimizations are able to reduce the energy consumption indirectly while reducing the executed instructions. For instance, the improvements to the code generation techniques for the register stack can reduce the register saves and restores, further reduce the energy consumption and the execution delay. When implementing the low-power compilation optimizations, it is necessary to find a desirable tradeoff among the improvement of processor's performance, the reduction of energy consumption and the extra cost of the compilation optimization.Firstly, the thesis summarizes the compilation optimizations in modern compiler and the direction of low-power compilation, then analyses the modern compiler such as IMPACT and TRIMARAN, especially their register allocation strategies. Then, the course of the development of register allocation strategy is illuminated in detail and a direct priority-based register allocation approach via the analysis and comparison of many improvements to the graph coloring strategy is proposed, it selects the split live range based on the priorities of the spilled live ranges not the priorities of the total candidate live ranges. Although it acquired some improvements of processor's performance, the decline of performance in some functions exposes the splitting algorithm's complexity. So it should be improved in future.At length, the thesis expounds the register stack and register stack engine in Itanium and analyses the existed improvements to stack register allocation strategy in detail. Here a delaying-allocation optimizing strategy is proposed, it adopts a coarse-grained adjustment of the stack frame. At the call site allocations, the caller's stack frame is reduced according to the actual usage while the callee only be allocated a limited stack frame, consequently, the potential spill is reduced to the best advantage.