Study On The Crucial Techniques Of Loran-C Digital Receiver

A study on crucial techniques of Loran-C digital receiver is carried out in thispaper, and the SOPC technology is utilized to implement the crucial techniques.With the development of digital integration technique, especially the progress inmicroelectronics, more digital circuitry can be fabricated into per square millimeter ofintegrated-circuit material. The great efficiency, the high capability, the multi-function,the low cost and the digital technique are becoming the most important factors in theelectronic designs. With steady advances in silicon technology, the implementation ofSystem-On-a-Programmable-Chip (SOPC) is enabled based on Field-ProgrammableGate Array (FPGA) technologies. The following points are expounded and discussed in this thesis. Firstly, theframework of Loran-C digital receiver is presented and analyzed in this paper.Secondly, the A/D conversion and the FFT of the Loran-C impulse signal areresearched. Thirdly, the FIR digital filter is designed and validated using MATLAB,which is realized through the relative tools for SOPC. Finally, the algorithm for thecycle identification of Loran-C impulse signal is improved to process the digitalsignals, which is based on the "peak-to-peak" algorithm. The improved algorithm isalso validated using MATLAB and realized through the related tools for SOPC. The improved algorithm is applied in the detection of the phase tracking pointof BPL digital signals. Some modifications to the algorithm are necessary to fit thecharacteristic of BPL impulse signals.The result indicates that these crucial techniques designed with SOPC arefeasible and available. The capability of Loran-C receiver is advanced by using SOPCtechnology. Some techniques of the Loran-C digital receiver are not studied in thispaper, which are needed to research in the future.