The Research And VLSI Design Of Image Compression Coding Based On Lifting Wavelet Transform

The digital Image needs greatly storage capacity and wide transmissionchannel, particularly at needs realize cosmically image database and highresolution real-time image .Therefore, It is necessary to compress the image dataeffectively. The discrete wavelet transform(DWT) has been applied extensivelyto digital image coding Because of a good many choiceness characteristic. A lotof scholars has been done a great deal of researches in image coding based on theDWT. But the research of the hardware implementation relatively less, mobilitydifference, and the technology of special-purpose chip is something to keepsecret. Therefore, It is very meaningful to design the special-purpose DWTimage coding chip. Much work of this paper has been done in the analysis of the image codingalgorithms and designing the VLSI structures. Such as the VLSI implementationof the 2D-DWT;This paper also analyzed the difficulty in the VLSI design ofSPIHT algorithms, and gave out homologous resolution;On the basis of2D-DWT and SPIHT, We proposed a VLSI structure of still image compressioncoding. This paper also researched video image compression algorithms, andproposed homologous VLSI structure based on DVI. The design use VHDLlanguage as programming language, and the simulation work on this designusing MAX+PLUSⅡ. At last, the coder is verified by altera FPGA successfully.The main work and content are sum up as follows:In chapter 1, it is briefly introduced the basic knowledge of image coding.Such as the possibility and necessary of image compression coding , the type ofdata redundancy, the classic image coding and the modern image coding, andintroduced history and present research situation of image coding. The authoralso introduced the ASIC design method and design cycle, the hardwaredescription language and the MAX+PLUSⅡ software. Research content andprincipal work have been proposed in this chapter.In chapter 2, the author researched the basic theory and algorithms of thestill image compression coding, and proposed the collectivity scheme of VLSIdesign.In chapter 3, the author researched the main problem in the VLSIimplementation of lifting scheme 2D-DWT. The design regarded bumpingoperational speed, economizing hardware resource, ensuring operational veracityand stability as principle. The paper proposed a high efficient VLSI architecturefor 2D-DWT by using a lifting-based scheme. Where the fold and Time DivisionMultiplexing(TDM) technology are adopted to optimize the design of thearchitecture. The high frequency component and the low frequency componentare available alternately. At the same time, the design using lifting-schemewavelet transform intrinsic data dependency, introducing pipelined processingmethod. In order to insure operative veracity , spanning one wavelet coefficientneeds two clock periods, but by the reason of adopting pipelined , So as to eachclock period have got new wavelet coefficient export, compromise know clearlyoperational speed and operation veracity dual require. At the same time, in orderto bump up the wavelet transform hardware structure portability, the authorproposed a sort of repeated bound blocking wavelet transform method, Themethod keep out of square effect, and bump portability up.In chapter 4, the author has been researched the difficulty and challenge onSPIHT algorithm of hardware implementation, and adopted a sort of quadrupleparallel architecture. The method respectively encode the undermost frequentlyspawn bring, level, plumb, diagonal fringe detail information. And adopteddifferent telescope for them .The undermost frequently spawn strap maintainflood of important information, so it must be adopted high telescope. The othersadopted the same telescope. The encode course is controlled by finite statemachine. The method lowers down the operational complexity and timeconsumption, it is prone to hardware implementation .The still image codingadopted lifting wavelet transform combined improved SPIHT in this paper, Thecoding speed of this method has been raised by 2 ~ 3 times than that oftraditional method.In chapter 5, it is emphasis the digital video interface (DVI) and the decoderchip. The design regarded DVI as digital video source. The 3D-DWT is made upof spatial 2D-DWT and temporal 1D-DWT. And adopted 3D-SPIHT .Theauthor proposed a VLSI structure of video image coding based on lifting wavelettransform and improved 3D-SPIHT , and simulated some of module.In chapter 6, a brief summation is set out.The main contribution of this dissertation is listed as follows:1,The author proposed a high efficient VLSI architecture for DWT by using alifting-based scheme. Where the fold and Time Division Multiplexing(TDM)technology are adopted to optimize the design of the architecture. Compromiseoperational veracity, economizing hardware resource, bumping operational speedup. And establish foundation for the hardware implementation of video imagecoding.2,the author adopted a sort of quadruple parallel SPIHT algorithm , lower downthe operation complexity and time consumption, The method respectively encodethe undermost frequently spawn bring, level, plumb, diagonal fringe detailinformation. Adopting different telescope dam is in favor of improving thequality of the resume image.3,the author do some research on video image coding , and proposed a VLSIstructure of video image coding based on lifting wavelet transform and improved3D-SPIHT . And establish foundation for the hardware implementation of videoimage coding, transmission and display.