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Investigation On Electromagnetic Compatibility Analysis Methods Of Digital Analog Hybird Circuits

Posted on:2011-07-23Degree:MasterType:Thesis
Country:ChinaCandidate:Y X ZhangFull Text:PDF
GTID:2178330338980147Subject:Power electronics and electric drive
Abstract/Summary:PDF Full Text Request
With the trend of the high-speed digital circuits toward faster edge rates, higher density, lower power, high-speed PCB board-level electromagnetic compatibility problems become increasingly serious. Speciously in the digital analog hybrid circuits, electromagnetic interference has always been a problem. The electromagnetic compatibility problem has become the bottleneck of the high-speed digital circuit design. Therefore, it is very important to investigate the electromagnetic compatibility (EMC) of the printed circuit board.Firstly, in this paper finite element method is used to accurate modeling and simulation for electromagnetic compatibility of the high-speed printed circuit board. And at the help of full-wave electromagnetic field method, the power integrity problem of the high-speed circuit is detailed studied. In order to establish a robust power delivery network, the input impedance of the power/ground plane pair is designed to maintain the target impedance and the placement and value of the decoupling capacitors are also discussed. The origins of simultaneous switching noise (SSN) are introduced in detail. Then the effective method of reducing the SSN is discussed based on simulation and experimental test to minimize the effect of the power distribution system. The results are validated by strict experiments. Hence, the results are effective and accurate.Secondly, the origins of the interference of analog circuits are analyzed in detail. The way how the digital noise interference on the analog circuit is shown, and the methods in the electromagnetic interference (EMI) suppression is also investigated.Finally, the modeling and analysis of signal integrity of the high-speed non-ideal interconnects are investigated. And the risk of the signal across the segmentation is analyzed. The origin of the segmentation of the non-ideal interconnect is discussed, and the suppression of the influence is introduced.
Keywords/Search Tags:PCB, EMC, Power integrity, SSN, EMI
PDF Full Text Request
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