Implementation & Optimization Of Network Coding On Network Processor

Along with the rapid development of network technology, web-based applications and services are becoming more and more popular. For example, web services such as emails, search engines, e-commerce, have brought great changes to human lives. Networks have provided a quick and convenient means of communication, thus linking the whole world together closely. At the same time, increasing web applications also make the data traffic increase exponentially, adding additional burdens to routers. The updating of network devices can no longer meet the growing data traffics.In this case, network coding technology has emerged. It improves the"store and forward", which is the basic transmission mode of current networks. It allows the intermediate nodes to do some encoding with the data, and uses multicast technology to send the packages to destination nodes. Then the receivers can decode the packages and get what they want.It has been proved that by using network coding technology, the transmission capacity of multicast can be maximized. Thus the network bandwidth can be fully used. Studies of network coding have great realistic significance and are recently becoming a hot area of researches.Network processors (NPs) are dedicated processors for network transmissions. They have many advantages, such as low power consumptions, high processing speed and high degree of parallelisms. The NPs of the Intel IXP series have a multi-cores and multi-threads framework. Among them, the IXP2850 NP has totally 16 micro cores, each of which can support 8 hardware threads. It can reach a high bit rate of 10 Gbps. Based on the IXP2850 NP, the Netronome has launched a new generation of NPs, the NFP3240, which has 40 micro cores and extended network interfaces. It can reach a bit rate of 40 Gbps.In this paper, we have implemented the network coding on NFP3240 NP. We also have done many optimizations on the algorithms. Based on the features of network coding and NFP3240 NP, we have designed and implemented the line-based dividing algorithm. After observing the influence of memory access on coding performance, we have proposed the cluster local scratchpad based data prefetching algorithm and achieved a throughput of 28 MB/s.By fully using the NP's ability of pipelined processing and its data transferring between registers of different micro cores, we implemented the line-first and row-first pipelined coding algorithms. The two algorithms achieved a maximized throughput of 21.65MB/s and 33.88MB/s, respectively.The main contribution of this paper is that network coding technology is implemented and optimized on network processors. According to NPS'pipelined processing, we proposed some coding algorithms. The experimental results show that row-first coding algorithm has fully used the pipeline of NPs and minimized the memory access. Thus we conclude it is a best practice on NPs.