Research Of The Key Technology Of Smart Camera Based On DSP And FPGA

Nowadays, smart camera has become a new orientation of machine vision. Its potential of detecting on line made it the mainstream way of the future vision measurement. However, the key technology of smart camera has not been fully developed in China and the technology is still at a low level. Compared with the international cooperation like Cognex, Matrox and Basler, some vision cooperation in china like DaHeng, Lingyun, Vision Dragon and JiaHenZhongZi don't have many patented products and can't dominate the home market. Based on the research of the development of smart camera and consideration of the characteristic of DSP and FPGA, this article has proposed a principal of smart camera based on DSP and FPGA hierarchical image process technology. Further more, the schematic and prototype have been designed. The control of data flow in FPGA has been explained in detail, and the widely used neighbor arithmetic has been programmed in FPGA. And the sobel arithmetic has been explained as an example. A simulative machine arm used for chip location has been set up at the laboratory, and the coordinate system was calibrated in static. The arithmetic used for chip location has been researched deeply, and the error in the measurement has been evaluated based on the experiments.The main work is shown as follows:(1) Based on the research of the development of machine vision home and abroad, this article has analyzed the separate characteristics of the two main kind of machine vision–vision based on PC and smart camera, and has summarized the advantages of smart cameras, and then the key technology of the smart camera has been studied.(2) Based on the previous achievement of vision sensor, the feature of image process arithmetic is researched, and the characteristics of the existing vision system is analyzed. Fully considering that DSP and FPGA have their own features while processing images, a sort of hierarchical image process technology based on both DSP and FPGA has been proposed in this article. The schematic and prototype have been designed.(3) Considering of the widely use of neighbor image process arithmetic, we implement the control of data flow in the program based on FPGA, As an example, the diagram of the program of sobel arithmetic has been explained in detail, and the result has been shown in the article, in additional, the efficiency of this method has been evaluated.(4) Principal of Multi-level image process by FPGA has been explained, the shortcomings of image process based on row was analyzed. The arithmetic used for chip location has been researched, and simulation experiments of the arithmetic have been made by the tools of Matlab and OpenCV. Image process pipeline based on DSP and FPGA has been researched.(5) A simulative machine arm used for chip location has been set up at the laboratory, and the coordinate system was calibrated in static. The error in the measurement has been evaluated based on the experiments.