The Research And Design Of π/4QPSK Modulation And Demodulation Based On FPGA

Far distance,large communication capability and high transmission quality are required in modern communication system.Modulation and demodulation, which is one of the most key techniques in communication, has always been an important aspect of researching field. In a certain extent,the quality of the demodulation algorithm determines the quality and efficiency of the communication system directly. The paper chooses the modulation code of ? 4QPSK, ? 4QPSK modulation is a linear narrowband technolody,which possesses features of high spectrum utilization ratio,better spectrum specification,stronger anti-fading performance and applicability to noncoherent detection. The modem method has been employed in mobile communication system,satellite communicationsystem,WLAN and so on..At first,the paper introduces the rationale of the modem. For modulation system,it gives the block diagram of the system,and studies the differential encoding technology, does simulation of the performance in Matlab. For demodulation system,it mainly compares three difference demodulation methods, then chooses the baseband difference demodulation method,and gives the scenario of the system.Then the paper analyses the key technologies of the ? 4QPSK system. Emphasizes on forming filter,chooses the square-root raised-cosine for roll-off factor of 0.35,and does simulation of the performance in Matlab, display of the result of simulation.Also Emphasizes on bit synchronization, in a study of some synchronous algorithm, adopts the Gardner algorithm whice has nothing to do with frequency error,and does simulation of the performance in Matlab.Then does simulation of the system in Matlab,and draw a conclusion.Finally,On this foundation, eaeh module of the system will be designed by Verilog in Quartus II 7.0 of Altera,including the total system scheme as well as the implement details.The total system can be divided into two parts,i.e,transmitter and receiver unit. The transmitter unit mainly consisted of the serial-to-parallel conversion,differential encoder and ? 4QPSK modulator and so on.The receiver unit mainly consisted of the digital down converter, integration and dump module, differential demodulator, parallel-to-serial conversion module, AFC module and bit synchronization module and so on.Through the simulation to prove the correctness of function. Through the simulation and analysis,the scenario of the system attains the expected performance.