Ï€/4-DQPSK Mode System Based On Software Radio Technology

As a new system structure applied to wireless communication, software definedradio technology, was proposed in resent years. Taking digital signal processing as thecore, it is based on the principle of modern communication and supported bymicro-electronics technology. The basic concept of SDR is to implement as manywireless and personal communication functions realized by software as possible on auniversal hardware platform. The flexibility and re-configurability make it recordwith modern communication development and become the research hotspot ofcommunication system design. Modulation and demodulation technology, as one ofits most key techniques, directly determines the quality and efficiency ofcommunication system in some extent.The task of this paper is realizing π/4-DQPSK modem system based on softwaredefined radio technology. π/4-DQPSK digital modulation and base-band differentialdemodulation technology are used to transmit signals. Here, input bit rate is250kbps,carrier frequency is500kHz. As a linear narrowband technology, π/4-DQPSKmodulation has high spectrum utilization ratio, better spectrum specification, andstronger anti-fading performance. It’s also applied to non-coherent detection.Firstly, basic theory of π/4-DQPSK mode system is introduced; the structure andprinciple of the system are analyzed. In the modulation part, the differential encodingtechnique is studied, the system block diagram is given out, and the performancesimulation in Matlab is done; in demodulation part, the base-band differentialdemodulation is chosen by comparing two different demodulation methods. Therealization scheme of the base-band differential demodulation is also given.Then, the key technologies of π/4-DQPSK mode system are researched, includingforming filters, numerically controlled oscillator (NCO) and bit synchronizationtechnique. The square-root raised cosine filter with roll-off factor of0.35is chosen asthe forming filter. An improved table lookup method is used to design NCO.Synchronous algorithm adopts the optimized Gardner algorithm, which has nothing to do with the frequency error. Each key module is simulated in Matlab/Simulink.Especially, the NCO module is converted to VHDL file and downloaded to FPGAchip to simulate on hardware. The FPGA chip chosen in this paper is EP2C35F672C6of Cyclone II series. At last, the whole system is emulated in Matlab. As thesimulation results and analysis showed that the π/4-DQPSK mode system designed inthe subject works well and attains the expected performance.