Design Of Realtime Edge-detection Circuit Based On Improved SUSAN Algorithm

Edge-detect of vedio image is an important part in ntelligent video surveillance chip design. Reliable, fast, anti-noise edge detection circuit is of great significance in engineering applications.The circuit design of the program includes the I2C interface, video capture module, data buffer FIFO, edge-detect module, memory controller and other modules. In order to improve the system for real-time image processing, with ping-pong operation control data flow mode, video capture module and edge-detect module will deal with the image acquisition and processing in turn, and then output image processed data according to the beat uninterruptedly. The design of the circuit module will focus on the edge- detect circuit module, which is based on improved SUSAN algorithm. As edge-detecti algorithm of surface gradient has some defects like edge width, poor accuracy and susceptity to noise, this thesis will adopt SUSAN edge-detect algorithm which is based on similarity comparison of gray. However, the operator templates are large and process slowly. They can not meet real-time requirements, so the SUSAN algorithm has to be improved. First of all, we do not use fixed templates. According to target points and their associated differences in neighboring pixels, as well as edge type features, this thesis designs layer by layer approximation operator algorithm, where the gray scale of different adaptive image area will select appropriate templates accordingly. This method can greatly reduce the amount of computation while it will not affect the accuracy of edge-detect algorithms; Second, image block processing, sub- block image contrast analysis as well as image block difference threshold adaptive gray region extraction method make the algorithm more adaptive in comparison to different image contrast and noise conditions. The improved algorithm not only significantly speed up the algorithm for computing speed, but, to a larger degree, can effectively improve the gray-scale images of different edge detection and suppress the noise.This algorithm includes window generation module, the window of registers, three template modules and gray scale approximation threshold extraction module. The size of edge-detect is designed to be 5*5. To speed up window data update rate and reduce the amount of data movement, column buffer, which can make the window data to a clock update, is designed. Column buffer can put the data to the window one-time; three class module scale approximation module according to the background of the image point or points of difference between the edge templates of different calculators. It can reduce edge- detect without the premise of reducing the image edge-detect algorithm of the calculation. Extracted gray level threshold block counter module in accordance with the block and the block of image gray threshold image extraction, the use of address mapping method to sort the gray value image, reducing the sort of computation and reduce the circuit design complexity. Finally, the simulation circuit design, simulation software under the Modelsim waveform analysis proved that the circuit design function and timing requirements are met.