| Using the band gap poor and the lattice mismatch rate between Si and SiGe,SiGetechnology will be able to take engineering and strain engineering into Si-based devices andintegrated circuit manufacturing,increase the device carrier mobility and structure desig~Flexibility,thus enhancing the electrical properties of Si-based devices,and providing aneffective way for sustained development of Si integrated circuitStarted from the basic physical properties of relaxed Si and SiGe materials andpreparation of strain SiGe material,this paper analyzed the stress introduced mechanismBased on the band structure of relaxed Si and SiGe materials,this paper focused on Holemobility enhancement mechanism the strain SiGe material,then established the main ph3,sicalparameters of the a~alytical model,including mobility,dielectric constant,and band gapdifference；based on device physics,combined with strain SiGe PMOS structure andmanufacturing process characteristics,this paper used the depletion layer approximation toestablish strain SiGe PMOS quantum well channel threshold voltage model,which reflectsthe impact of substrate and channel doping concentration,channel Ge fraction,silicon capthickness and other physical and geometrical structure parameters on the threshold voltage；Based on the above study,research and analysis of the impact of temperature and strain SiGeMaterials growth rate,energy and dose of ion implantation,rapid thermal annealing time andtemperature parameters on the critical strain SiGe PMOS quantum well channel devicephysics,electrical properties w-as done；Finally,using process simulation SoftwaJ'e Silvaco tcsimulate and optimize the device performance and production,this paper obtained theoptimized strained SiGe PMOS quantum well channel device fabrication process steps andprocess conditions,and device structure model with performance enhanced The study abovewould make the foundation for strained SiGe device manufacturing and applications... |
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