| Due to valence band splits in strained SiGe material, the effective hole massreduced and inter-band scattering is lower, so that the hole mobility has been greatlyimproved, the strained SiGe material as the conductive channel can greatly improve thePMOSFET device performance, and the strained SiGe technology has a strongcompatibility with traditional Si technology, therefore, has become a hot spot studied.The formation mechanism of strained SiGe and preparation methods are describedin this thesis, and the basic physical and electrical properties are discussed, establishmodels of band structure, effective mass, mobility models and other major physical andelectrical parameter of strain SiGe materials. How do the SiGe layer thickness, Gecomposition, doping concentration, Si cap thickness and other physical parameters andthe geometric structure influence performance are studied with device simulationsoftware ISE-TCAD. Low-temperature Si technology and gate oxide process and itspreparation are analyzed, and obtain an optimized device manufacturing process ofstrained SiGe PMOSFET, produce prototype samples, through sample DCcharacteristics of the test showed that the device performance is compatibility withspecifications. Mechanism and its impact on device performance of strained SiGePMOSFET device hot carrier effect are analyzed. establish device gate current andsubstrate current model of SiGe PMOSFET, quantum well and the mean free path areadded into the gate current model, simulation results show that the model conforms tothe actual situation, and proposed advices to inhibit hot carrier happen in strain SiGePMOSFET devices. Based on the above study, analyzed causes of threshold voltageshift factors, and establish the threshold voltage shift model, the model using Matlabsoftware simulation results show that the agreement with the experimental data. Theresult of this study provides theoretical and practical basis for manufacturing strainedSiGe devices and IC design. |
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