Reasch And Design Of NAVTEX Demodulator Based On FPGA

NAVTEX system is a system for broadcasting and automatically receceiving information which based on narrow-band direct-printing telegraph(NBDP). As an important part of the Global Maritime Distress and Safety System (GMDSS), NAVTEX sends and automatically receives the navigational warnings, weather forecasts and emergency information(Maritime Safety Information). Currently, most of NAVTEX receivers shipped in the domestic ships are imported. The funtion of NAVTEX receiver developed at home is simple and with low level intellingence which adopts analog demoduleation technology. With the development of modern shipping and the maturing of domestic NAVTEX business in Chinese, there is so much practical significance of designing NAVTEX receiver with Chinese reception function and with independent interllectual proerty rights.The thesis describes the development of the NAVTEX system and proposes a method of realization of NAVTEX demodulator based on FPGA. Firstly, it analyzes the compostion of the NAVTEX receiver, introduces the core module of the receiver-NAVTEX demodulator, and then proposes the design of demodulator based on FPGA. Secondly, it analyzes the compostion of the demodulator and gives specific design process including simulation experiments of key algorithms. The FPGA-based demodulator is applied in actual verification platform in order to test its performance. Results indicate that:the error rate of NAVTEX messages in English is below 4%, while the error rate of NAVTEX messages in Chinese is below 1%, when the intensity of input signal is-107dbm. And the demodulator has been successfully applied in actual NAVTEX receiver, which is able to receive NAVTEX messages in Chinese and English.