Design And Implementation Of A Spm Simulator Based On Trimaran Platform

In today's embedded systems, especially portable embedded device, the memory subsystem has been identified as the energy and performance bottleneck of the entire system. By virtue of its outstanding advantages in power, speed and size, scratch pad memory (SPM) gradually becomes the forcus of embedded researchers in recent years. The key problem of SPM research is how the compiler manage the memory space of SPM, whereas there is no one reseach tool which support both research in compiler management and SPM simulation to test the performance of compiling algorithm by now, which is quite inconvenient for SPM researchers.This thesis selects Trimaran as research platform, which is a mainstream opensource research tool for compilation and architecture in embedded system, then designs and implements a new Trimaran which can simulate SPM based on in-depth analysis of original Trimaran code. New Trimaran supports three kinds of SPM operating instruction, including the instruction for SPM reading and writing by CPU, the DMA instruction for data transfer between SPM and main memory and the SPM initializing instruction. These instructions are generated by compiler and passed to the SPM-support simulator as intermediate representation (IR). The modified simulator converts the IR into local C code and compiles it into object file with local compiler, then generates executable program by linking it with simulation library to simulate the application. In addition, in order to support SPM mechanism better, the new version of Trimaran also supports statistical analysis for SPM operations and provides a detailed trace for SPM operations.The experiment in this thesis shows the new Trimaran can simulate SPM mechanism effectively with little impact of original Trimaran's function and performance.