Design And Implement Based ARINC 659 Bus

As an important part of safety critical system, safe computing platforms have been loaded some application software, such as Zone Controller (ZC) and Data Service Unit (DSU). Vehicle on-board controllers of all trains within the bounds of ZC send train position and speed to ZC application program on safe computing platforms.Hardware and software for conventional communications are considered as black channel. When information transmitted in black channel caused errors or failures, the main reasons are random errors, hardware failures and system failures caused by hardware problems, which can lead to communication security risk, and an error or failure often leads to more security risks. Variety of important information on safe computer not only requires the system to have efficient and accurate operational capabilities, but also needs high communication security and reliability. Communications bus is a key factor to ensure data security on safe computing platforms. Only base on reliable communication bus, it is meaningful to research the implementation of technical details.Based on communication bus protocol standards of aviation backplane in ARINC Specification 659, the paper analyzes the needs of fail-safe communications of safety critical system. By comparing the advantages and disadvantages of various communication buses, ARINC Specification 659 is selected as the basis for this article. Protocol programs based on ARINC 659 are designed and realized in the basis of analyzing communication bus architecture.Communication bus is focus on high reliability time deterministic. The way to implementation of specific functions of scheduling strategy to ensure high fault tolerance and time deterministic is given in detailed in this paper. Fault-tolerant structure and dual bus cross-monitoring is to ensure high reliability of the communication bus, TDPA(Table Driven Proportional Access) is to ensure time deterministic of communication.Communication IP core is designed and realized based on programmable logic, which not only reduces the volume of circuit and improves the stability of the circuit, but also greatly reduces the design and debugging cycles of the whole system by this advanced development tools. In the implementation process, communication IP core is divided into different functional sub-module, by design and implementation of each sub-module and analysis of simulation results to ensure the basic correctness of design.The simulation can only ensure the result correct. The formal verification of the platform is based on assert by PSL (Property Specification Language). In order to avoid the potential design errors, use PSL to validate communication IP core, make formal verification of the validity and integrality of the compare core design. When the assert fail, the error can be detected. Analyze the error and modify the design, then simulate it again. After simulation, make formal verification again, until there is no potential design error.The paper shows that, for the design of communication bus based on programmable logic, it can test out the mistakes that the simulation can not discover by the use of assertions for formal verification in design and ensure the completeness and correctness of design, finally, a no design flaws and reliable communication bus is obtained.