The Research Of Turbo Code And Hardware Design

Turbo code has the decoding performance of nearing the Shannon limit. Its appearance has caused sensation on the field of coding theory, and has known as the error-correcting coding of 21st century.The goal of this paper is to study the hardware implement of the turbo encoder and decoder. Firstly, analyzing the turbo encoding and decoding systematically, and analyzing several soft input soft outpot decoding algorithms' performance and complexity. Secondly, study the sub-block parallel decoding algorithm , namely whole frame being divide into several block,for each block its initial value of border has been initialized,then carry through parallel processing. Finally, design the hardware to the selected project of turbo encoding and decoding . This paper is designed with modularization, and has proposed some improved schemes on the basis of the thing that has been designed to each module, improved the synchronous question among the turbo encoder, and has studied the hardware implement of turbo sub-block parallel decoding algorithm. In the design, the " top-down " and " from bottom to top "methods have been used synthetically. Through devid up the function module, set up the systematic parameter reasonably, and through the parameters transfer between the modules, can make turbo encoder and decoder have better flexibility.