Study And Design Of High Performance EBCOT Encoder For JPEG2000

JPEG2000 is the next generation digital still image compression standard introduced by JPEG (Joint Photographic Experts Group) in December, 2000. JPEG2000 adopts DWT (Discrete Wavelet Transform) as its core transform algorithm and EBCOT (Embedded Block Coding with Optimized Truncation) as its core coding algorithm. JPEG2000 not only provides superior compression performance over JPEG, but also provides a rich set of features, in answer to the ever growing requirements for image coding techniques.However, these advantages come at the price of much higher computation complexity, especially in the EBCOT Tier-1 coding algorithm. The two main components in EBCOT Tier-1, the bit-plane coding and context-based adaptive binary arithmetic coding algorithm each involves considerable bit-level operations and complex control, therefore becomes the processing bottleneck of the entire JPEG2000 encoding system. So, high performance EBCOT Tier-1 encoder design is the key to successful JPEG2000 encoder implementation. Meanwhile, because of the above characteristics of EBCOT Tier-1 encoder, it cannot be efficiently implemented on general-purpose RISC, DSP architecture. So, high-speed, low power application-specific hardware implementation of EBCOT Tier-1 encoder with reasonable area has fundamental importance for application of the JPEG2000 standard.Main work of this thesis includes:1) Analyzed the structure, principles and performance the JPEG2000 standard, and its core coding algorithm.2) Analyzed the bit-plane coding algorithm in EBCOT Tier-1. Studied the existing accelerating schemes, based on which, a novel sample-parallel bit-plane coding architecture capable of 4 sample coding per clock cycle is proposed, built on the pass-parallel architecture.3) Analyzed the context-based adaptive binary arithmetic coding algorithm (the MQ coder). Analyzed the limiting factors in MQ coder accelerating. Completed the design of an MQ encoder capable of encoding 2 samples per clock cycle.The EBCOT Tier-1 encoder design completed in this thesis has high processing capability and reasonable structure with balanced throughput between the two main components of bit-plane coder and MQ coder. Based on this design, even higher performance can be easily achieved for high-end applications, through the parallel processing of independent code-blocks using multiple copies of this design.