In VTS (Vessel Traffic Service) system, the processing, transmission and display of radar original video signal is very important. Thus the radar signal processing in analog form has many obvious shortcomings. So a digital real time system for radar signal acquisition and processing is designed by the chip of FPGA and DSP in this paper.This design is included radar signal acquisition and clutter suppression. On hardware, signal acquisition and correlation processing is completed in FPGA, clutter suppression is achieved in DSP.Clutter suppression is laid stress on the design. At first, preprocessing is completed in FPGA where correlation processing is applied. Thus clutter can be smoothed well, at the same time false alarm rate can be reduced. The foundation of further clutter processing is laid. Moreover, the algorithm of the clutter suppression based wavelet transform is adopted in DSP. The algorithm has the good capability in suppressing many kinds of clutter and can greatly improve signal-to-noise ratio. The applied method in thedesign presents theory analysis and experiment simulation result.
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