Research On Simulation Of Optical Proximity Effect In VDSM IC Manufacture

The fast development of information technology and the rapid upgrade of design technologies of VLSI increase the burden of the semiconductor manufacturing. The complexity of IC increases, the feature and spacing dimension in the design become smaller. Therefore, the real shapes created on the wafer will not be consistent with the layout when the feature sizes in the design are shorter than half of the wavelength of lithographic light source; in this case, Optical Proximity Effect (OPE) happens. OPE will result in bad performance circuits or even make the circuits invalid, and so it will significantly reduce the IC manufacture yield. Reticle Enhancement Technology (RET) emerges to retain the convention IC manufacture equipments and enable the stepper to create circuit with smaller features. To intentionally and systematically modify the mask to compensate for optical diffraction limit and process non-idealities is the basic idea of RET.Like other technologies used in IC design, RET needs the support of computer technology. Basically, RET has two ways to modify the original layouts. One is to change the shapes of the layout on the mask, which is called Optical Proximity Correction (OPC); the other is to assign different phases to different parts of the mask, which is called Phase Shifting Masks (PSM). Both of the two methods need an EDA tool to simulate the image on the wafer before the modification can be carried out. This paper studies the processes of the 1C manufacture, and focuses on how to build the model of each process.To build the lithographic model, we have studied the theory of how the wafer stepper works, and succeed in realizing the model for the lithographic exposure system. What's more, in this paper, a bilinear model is realized to speed up the sparse point intensity simulation; a Gaussian model is taken to simulate the behavior of the photomask being exposed and baked; an approach based on statistics is realized to build a Variable Bias Model (VBM) to simulate the etching process; an optimization method is presented to optimize the model parameters for the best accuracy.